Didier Demigny

Centre Hospitalier Lannion Trestel

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Lounis Kessal

École Nationale Supérieure de l'Électronique et de ses Applications

Sébastien Pillement

Institut d'Électronique et des Technologies du numéRique

Daniel Chillet

Université de Rennes

Ludovic Devaux

Université de Rennes

Lionel Torres

Université de Montpellier

Michel Robert

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Gilles Sassatelli

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Pascal Benoit

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Gaston Cambon

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

M. Karabernou

École Nationale Supérieure de l'Électronique et de ses Applications

Cooperative Institutions

Centre National de la Recherche Scientifique

Institut de Recherche en Informatique et Systèmes Aléatoires

Institut national de recherche en informatique et en automatique

Université de Rennes

École Nationale Supérieure de l'Électronique et de ses Applications

CY Cergy Paris Université

Université Paris-Saclay

Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Université de Montpellier

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Contracts and Grants with Industry - ANR Architectures du Futur - FOSFOR (2008-2011)

Daniel Chillet Sébastien Pillement Manh Cuong Pham Ludovic Devaux Didier Demigny

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Reconfigurable Architecture Using High Speed FPGA

IFIP advances in information and communication technology (2002)

Lounis Kessal R. Bourguiba Didier Demigny N. Boudouani M. Karabernou

Control reconfiguration

Reconfigurable Computing

10.1007/978-0-387-35597-9_7

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Citations (1)

Efficient ASIC and FPGA implementations of IIR filters for real time edge detection

Federico García Lorca Lounis Kessal Didier Demigny

To reduce the computation cost, Deriche (1987, 1990) extended the work from Canny (1986) on optimal edge detectors to the use of recursive filters. Nevertheless, this cost is still too high for real time implementation on FGGA circuits. Here, we optimized both the algorithmic and architectural aspects of the original Deriche filter. A new organization of the filter is proposed at the 2D and 1D levels which reduces the memory size and the computation cost by a factor of two for both software and hardware implementations. We prove that the use of only 3 bits to code the scale parameter does not reduce the quality. The result from this choice is that the first order recursive filter which is the basic block of the entire architecture can be built with only 4 adders. The architecture of a 10 Mpixels/second filter on an unique FPGA is described.

Application-specific integrated circuit

Implementation

Finite impulse response

10.1109/icip.1997.638793

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Citations (42)

Clear Stream towards Dynamically Reconfigurable Systems on Chip.

Reconfigurable Communication-centric Systems-on-Chip (2006)

Nicolas Abel Lounis Kessal Sébastien Pillement Didier Demigny

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Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability

Lecture notes in computer science (2004)

Pascal Benoit Gilles Sassatelli Lionel Torres Didier Demigny Michel Robert

SIGNAL (programming language)

10.1007/978-3-540-27776-7_14

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Conceptions nouvelles du détecteur de contours de Deriche

Didier Demigny Federico García Lorca Lounis Kessal Jean Pierre Cocquerez

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Two ASIC for Low and Middle Levels of Real Time Image Processing

IFIP advances in information and communication technology (2002)

Philippe Lamaty B. Mazar Didier Demigny Lounis Kessal M. Karabernou

Coprocessor

Frame rate

Application-specific integrated circuit

Chaining

10.1007/978-0-387-35597-9_1

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Reconfigurable ECU communications in Autosar Environment

Hung-Manh Pham Sébastien Pillement Didier Demigny

Reconfigurable architectures become popular in consumer applications as they require low Non-Recurring Engineering costs. Certain FPGA families provide the Dynamic Partial Reconfiguration (DPR) mechanism which allows to modify parts of a device on-the-fly. The high reliability constraints in automotive systems requires safe communications between ECUs (Electronic Control Unit). This paper presents a support for fault-tolerant communication modes among ECUs by the use of the dynamic reconfiguration paradigm. Also in this paper, a method of integrating dynamic reconfiguration in Autosar environment is presented.

AUTOSAR

Control reconfiguration

Electronic control unit

10.1109/itst.2009.5399289

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Evaluation of edge detectors performances with a discrete expression of Canny's criteria

Proceedings - International Conference on Image Processing (2002)

Didier Demigny Federico García Lorca Lounis Kessal

Three quality criteria have been defined by Canny (1986) to deduce an optimal edge detector in the continuous space domain. In this paper, we give an equivalent for these criteria in the discrete space domain. These new criteria are better in accordance with experimental results than previous one. Furthermore, they are more suitable to compare filters performances. We explain how to compute them. We compare some edge detectors. Finally, we use them to prove the qualities of a new simpler implementation of a second order recursive smoothing filter issued from Canny's theory.

Canny edge detector

Deriche edge detector

Smoothing

10.1109/icip.1995.537441

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Citations (25)

Design flexibility using fpga dynamical reconfiguration

N. L. Abel Lounis Kessal Didier Demigny

In this paper, we detail the implementation of an image processing algorithm on the dynamically reconfigurable architecture ARDOISE. Beyond the complexity of this algorithm, we pay our attention on the possibilities offered by dynamic reconfiguration paradigm. We insist particularly on the software management of reconfigurations and on the flexibility it leads. We spread these concepts, tested practically on ARDOISE, in more complex cases which will be the object of future studies.

Control reconfiguration

Reconfigurable Computing

10.1109/icip.2004.1421691

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Citations (4)