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Benjamin Grisafe

University of Notre Dame

35

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346

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Nanoporous Dielectric Resistive Memories Using Sequential Infiltration Synthesis.

2021 ACS Nano
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Experimental Demonstration of Gate-Level Logic Camouflaging and Run-Time Reconfigurability Using Ferroelectric FET for Hardware Security

2021 IEEE Transactions on Electron Devices
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BEOL Compatible Dual-Gate Ultra Thin-Body W-Doped Indium-Oxide Transistor with $\mathrm{I}_{\mathrm{on}}=370\mu\mathrm{A}/\mathrm{um}$. SS = 73mV/dec and $\mathrm{I}_{\mathrm{on}}/\mathrm{I}_{\mathrm{off}}$ ratio > 4×109

2020 VLSIT | Symposium on VLSI Technology
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Monolithic 3D Integration of High Endurance Multi-Bit Ferroelectric FET for Accelerating Compute-In-Memory

2020 IEDM | International Electron Devices Meeting
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Fully transparent field-effect transistor with high drain current and on-off ratio

2020 APL Materials
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Hf0.5Zr0.5O2 Based Ferroelectric Gate HEMTs (FeHEMTs) with Large Threshold Voltage Tuning Range

2020 IEEE Electron Device Letters
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Hysteresis-free negative capacitance in the multi-domain scenario for logic applications

2019 IEDM | International Electron Devices Meeting
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Significance of Multi and Few Domain Ferroelectric Switching Dynamics for Steep-Slope Non-Hysteretic Ferroelectric Field Effect Transistor

2019 DRC | Device Research Conference
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Stabilizing the commensurate charge-density wave in 1T-tantalum disulfide at higher temperatures via potassium intercalation

2019 Nanoscale
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Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration

2019 IEEE Micro
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