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S.V. Cherepko
S.V. Cherepko
Electronic engineering
Amplifier
Engineering
MOSFET
Harmonic balance
7
Papers
44
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Effects of Dummy Gate on Breakdown and Degradation of LDMOSFETs
2008
IEEE Transactions on Device and Materials Reliability
M.N. Marbell
S.V. Cherepko
James C. M. Hwang
M.A. Shibib
W. R. Curtice
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Citations (12)
Adaptive LDMOSFET Drain and Dummy-Gate Biases for Highly Modulated Signals
2008
IEEE Transactions on Electron Devices
M.N. Marbell
S.V. Cherepko
W. R. Curtice
James C. M. Hwang
M.A. Shibib
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Citations (1)
Modeling and Characterization of Effects of Dummy-Gate Bias on LDMOSFETs
2007
IEEE Transactions on Electron Devices
M.N. Marbell
S.V. Cherepko
James C. M. Hwang
M.A. Shibib
W. R. Curtice
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Citations (13)
An improved large-signal model for harmonic-balance simulation of Si LD-MOSFETs
2004
EuMC | European Microwave Conference
M.N. Marbell
S.V. Cherepko
A. Madjar
James C. M. Hwang
M. Frei
M.A. Shibib
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Citations (4)
Large-signal modeling and characterization of high-current effects in InGaP/GaAs HBTs
2002
IEEE Transactions on Microwave Theory and Techniques
M.S. Shirokov
S.V. Cherepko
Xiaohang Du
J.C.M. Kwang
D.A. Teeter
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Citations (10)
RF vs. DC breakdown: implication on pulsed radar applications [MESFETs]
2001
GAICS | IEEE Gallium Arsenide Integrated Circuit Symposium
Yu Zhang
S.V. Cherepko
James C. M. Hwang
Subrata Halder
K. Radhakrishnan
Geok Ing. Ng
Jean Luc Muraro
A. Bensoussan
Jean-Louis Cazaux
Michel Soulard
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